Integrated circuits are typically mounted onto circuit boards that route signals and power to the integrated circuits using conductive traces that are designed to have a desired characteristic impedance. For a single trace, the impedance is typically around 50 ohms whereas the differential resistance for a differential pair of traces is 100 ohms (corresponding to a common-mode resistance of 25 ohms). The conductive traces act as transmission lines for the signals they carry. As is well known in the transmission line arts, signal reflections result if a transmission line drives a load that is not matched to the characteristic impedance of the line. Thus, it is desirable to match the input/output impedance of an integrated circuit to the printed circuit board impedance to prevent these unwanted signal reflections and associated glitches.
For example, a ball grid array (BGA) package 100 is shown in FIG. 1. BGA package 100 includes a BGA substrate 105 and an integrated circuit semiconductor die 110. Semiconductor die 110 can be connected to BGA substrate 105 through, for example, wire bonding or flip-chip methods. FIG. 1 illustrates a flip-chip construction in which the active surface of die 110 is “flipped” so that it faces substrate 105 and conducts to substrate 105 through a plurality of flip-chip solder bumps 115 that couple to corresponding pads on the die. In contrast, if the die were wire-bonded, the active surface of the die would face away from the package substrate. Since the active surface of die 110 faces substrate 105, BGA integrated circuit package 100 may also be denoted as a flip-chip BGA package 100 in that the substrate is flipped with regard to a wire-bonding orientation.
BGA substrate 105 conducts to traces (not shown) on a printed circuit board 120 through an array of solder balls 125, hence the name “ball grid array.” BGA substrate 105 in turn includes conductive traces to couple a given solder ball 125 to a corresponding flip-chip bump 115. FIG. 2 is a cross-sectional view of BGA package 100 to illustrate a plurality of BGA substrate conductive traces 200. These BGA substrate traces are designed to have the same characteristic impedance as the traces used on circuit board 120. But the on-die structures such as input/output buffers, termination resistors, and electrostatic discharge (ESD) circuits typically introduce significant amounts of capacitance. Moreover, the pads and associated metallization of BGA substrate 105 also add to this capacitive load. The resulting capacitance introduces an impedance mismatch between the die circuitry and the BGA substrate traces. This mismatch is frequency dependent and thus increases at higher frequencies.
To address this impedance mismatch, it is conventional to use on-die planar inductors. But such die structures use valuable silicon area and thus increase cost. Accordingly, there is a need in the art for improved impedance matching architectures for integrated circuits.
Embodiments of the present invention and their advantages are best understood by referring to the detailed description that follows. It should be appreciated that like reference numerals are used to identify like elements illustrated in one or more of the figures.